? semiconductor components industries, llc, 2015 june, 2015 ? rev. p0 1 publication order number: 74lvc540a/d 74lvc540a product preview low-voltage cmos octal buffer flow through pinout with 5 v?tolerant inputs and outputs (3?state, inverting) the 74lvc540a is a high performance, inverting octal buffer operating from a 1.2 to 3.6 v supply. this device is similar in function to the mc74lcx240, while providing flow through architecture. high impedance ttl compatible inputs significantly reduce current loading to input drivers while ttl compatible outputs offer improved switching noise performance. a v i specification of 5.5 v allows 74lvc540a inputs to be safely driven from 5 v devices. the 74lvc540a is suitable for memory address driving and all ttl level bus oriented transceiver applications. current drive capability is 24 ma at the outputs. the output enable (oe1 , oe2 ) inputs, when high, disables the outputs by placing them in a high z condition. features ? designed for 1.2 to 3.6 v v cc operation ? 5 v tolerant ? interface capability with 5 v ttl logic ? supports live insertion and withdrawal ? i off specification guarantees high impedance when v cc = 0 v ? 24 ma output sink and source capability ? near zero static supply current in all three logic states (10 a) substantially reduces system power requirements ? latchup performance exceeds 250 ma ? esd performance: ? human body model > 2000 v ? machine model > 200 v ? these devices are pb?free, halogen free/bfr free and are rohs compliant this document contains information on a product under development. on semiconductor reserves the right to change or discontinue this product without notice. marking diagrams see detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet. ordering information www. onsemi.com 1 20 a = assembly location l, wl = wafer lot y, yy = year w, ww = work week g or = pb?free package soic?20 wb dw suffix case 751d lvc540a awlyywwg lvc 540a alyw tssop?20 dt suffix case 948e 1 1 20 1 20 20 (note: microdot may be in either location)
74lvc540a www. onsemi.com 2 figure 1. pinout: 20?lead (top view) 19 20 18 17 16 15 14 2 1 34567 v cc 13 8 12 9 11 10 oe2 o0 o1 o2 o3 o4 o5 o6 o7 oe1 d0 d1 d2 d3 d4 d5 d6 d7 gnd figure 2. logic diagram oe1 1 d0 2 o0 18 d1 3 o1 17 d2 4 o2 16 d3 5 o3 15 d4 6 o4 14 d5 7 o5 13 d6 8 o6 12 d7 9 o7 11 oe2 19 pin names function output enable inputs data inputs 3?state outputs pins oen dn on truth table inputs outputs oe1 oe2 dn on l l l h l l h l x h x z h x x z h = high voltage level l = low voltage level z = high impedance state x = high or low voltage level and transitions are acceptable for i cc reasons, do not float inputs
74lvc540a www. onsemi.com 3 maximum ratings symbol parameter value condition unit v cc dc supply voltage ?0.5 to +6.5 v v i dc input voltage ?0.5 v i +6.5 v v o dc output voltage ?0.5 v o +6.5 output in 3?state v ?0.5 v o v cc + 0.5 output in high or low state (note 1) v i ik dc input diode current ?50 v i < gnd ma i ok dc output diode current ?50 v o < gnd ma +50 v o > v cc ma i o dc output source/sink current 50 ma i cc dc supply current per supply pin 100 ma i gnd dc ground current per ground pin 100 ma t stg storage temperature range ?65 to +150 c t l lead temperature, 1 mm from case for 10 seconds t l = 260 c t j junction temperature under bias t j = 135 c ja thermal resistance (note 2) soic = 65.8 tssop = 110.7 c/w msl moisture sensitivity level 1 i latchup latch?up performance at v cc = 3.6 v and 125 c (note 3) 250 ma stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device function ality should not be assumed, damage may occur and reliability may be affected. 1. i o absolute maximum rating must be observed. 2. measured with minimum pad spacing on an fr4 board, using 10 mm?by?1 inch, 2 ounce copper trace no air flow. 3. tested to eia/jes078. recommended operating conditions symbol parameter min typ max units v cc supply voltage operating functional 1.65 1.2 3.6 3.6 v v i input voltage 0 5.5 v v o output voltage high or low state 3?state 0 0 v cc 5.5 v i oh high level output current v cc = 3.0 v ? 3.6 v v cc = 2.7 v ? 3.0 v ?24 ?12 ma i ol low level output current v cc = 3.0 v ? 3.6 v v cc = 2.7 v ? 3.0 v 24 12 ma t a operating free?air temperature ?40 +125 c t/ v input transition rise or fall rate, v in from 0.8 v to 2.0 v, v cc = 3.0 v 0 10 ns/v functional operation above the stresses listed in the recommended operating ranges is not implied. extended exposure to stresse s beyond the recommended operating ranges limits may affect device reliability.
74lvc540a www. onsemi.com 4 dc electrical characteristics symbol parameter conditions ?40 c to +85 c ?40 c to +125 c unit min typ (note 4) max min typ (note 4) max v ih high?level input voltage v cc = 1.2 v 1.08 ? ? 1.08 ? ? v v cc = 1.65 v to 1.95 v 0.65 x v cc ? ? 0.65 x v cc ? ? v cc = 2.3 v to 2.7 v 1.7 ? ? 1.7 ? ? v cc = 2.7 v to 3.6 v 2.0 ? ? 2.0 ? ? v il low?level input voltage v cc = 1.2 v ? ? 0.12 ? ? 0.12 v v cc = 1.65 v to 1.95 v ? ? 0.35 x v cc ? ? 0.35 x v cc v cc = 2.3 v to 2.7 v ? ? 0.7 ? ? 0.7 v cc = 2.7 v to 3.6 v ? ? 0.8 ? ? 0.8 v oh high?level output voltage v i = v ih or v il v i o = ?100 a; v cc = 1.65 v to 3.6 v v cc ? 0.2 ? ? v cc ? 0.3 ? ? i o = ?4 ma; v cc = 1.65 v 1.2 ? ? 1.05 ? ? i o = ?8 ma; v cc = 2.3 v 1.8 ? ? 1.65 ? ? i o = ?12 ma; v cc = 2.7 v 2.2 ? ? 2.05 ? ? i o = ?18 ma; v cc = 3.0 v 2.4 ? ? 2.25 ? ? i o = ?24 ma; v cc = 3.0 v 2.2 ? ? 2.0 ? ? v ol low?level output voltage v i = v ih or v il v i o = 100 a; v cc = 1.65 v to 3.6 v ? ? 0.2 ? ? 0.3 i o = 4 ma; v cc = 1.65 v ? ? 0.45 ? ? 0.65 i o = 8 ma; v cc = 2.3 v ? ? 0.6 ? ? 0.8 i o = 12 ma; v cc = 2.7 v ? ? 0.4 ? ? 0.6 i o = ?24 ma; v cc = 3.0 v ? ? 0.55 ? ? 0.8 i i input leakage current v i = 5.5v or gnd v cc = 3.6 v ? 0.1 5 ? 0.1 20 a i oz off?state output current vi = vih or vil; v o = 5.5 v or gnd; v cc = 3.6 v ? 0.1 5 ? 0.1 20 a i off power?off leakage current v i or v o = 5.5 v; v cc = 0.0 v ? 0.1 10 ? 0.1 20 a i cc supply current v i = v cc or gnd; i o = 0 a; v cc = 3.6 v ? 0.1 10 ? 0.1 40 a i cc additional supply current per input pin; v i = v cc ? 0.6 v; i o = 0 a; v cc = 2.7 v to 3.6 v ? 5 500 ? 5 5000 a product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product performance may not be indicated by the electrical characteristics if operated under different conditions. 4. all typical values are measured at t a = 25 c and v cc = 3.3 v, unless stated otherwise.
74lvc540a www. onsemi.com 5 ac electrical characteristics (t r = t f = 2.5 ns) symbol parameter conditions ?40 c to +85 c ?40 c to +125 c unit min typ 5 max min typ 5 max t pd propagation delay (note 6) ndn to no n v cc = 1.2 v ? 18.0 ? ? ? ? ns v cc = 1.65 v to 1.95 v 1.0 ? 16.4 1.0 ? 16.4 v cc = 2.3 v to 2.7 v 1.0 ? 7.8 1.0 ? 7.8 v cc = 2.7 v 1.0 ? 7.1 1.0 ? 7.1 v cc = 3.0 v to 3.6 v 1.0 ? 5.3 1.0 ? 5.3 t en enable time (note 7) noe to no n v cc = 1.2 v ? 20.0 ? ? ? ? ns v cc = 1.65 v to 1.95 v 1.0 ? 16.5 1.0 ? 16.5 v cc = 2.3 v to 2.7 v 1.0 ? 10.5 1.0 ? 10.5 v cc = 2.7 v 1.0 ? 8.0 1.0 ? 8.0 v cc = 3.0 v to 3.6 v 1.0 ? 6.6 1.0 ? 6.6 t dis disable time (note 8) noe to no n v cc = 1.2 v ? 18.0 ? ? ? ? ns v cc = 1.65 v to 1.95 v 1.0 ? 15.9 1.0 ? 15.9 v cc = 2.3 v to 2.7 v 1.0 ? 9.0 1.0 ? 9.0 v cc = 2.7 v 1.0 ? 8.2 1.0 ? 8.2 v cc = 3.0 v to 3.6 v 1.0 ? 7.4 1.0 ? 7.4 t sk(0) output skew time (note 9) ? ? 1.0 ? ? 1.5 ns product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product performance may not be indicated by the electrical characteristics if operated under different conditions. 5. typical values are measured at t a = 25 c and v cc = 3.3 v, unless stated otherwise. 6. t pd is the same as t plh and t phl . 7. t en is the same as t pzl and t pzh . 8. t dis is the same as t plz and t phz . 9. skew between any two outputs of the same package switching in the same direction. this parameter is guaranteed by design. dynamic switching characteristics symbo l characteristic condition t a = +25 c unit min typ max v olp dynamic low peak voltage (note 10) v cc = 3.3 v, c l = 50 pf, v ih = 3.3 v, v il = 0 v v cc = 2.5 v, c l = 30 pf, v ih = 2.5 v, v il = 0 v 0.8 0.6 v v olv dynamic low valley voltage (note 10) v cc = 3.3 v, c l = 50 pf, v ih = 3.3 v, v il = 0 v v cc = 2.5 v, c l = 30 pf, v ih = 2.5 v, v il = 0 v ?0.8 ?0.6 v 10. number of outputs defined as ?n?. measured with ?n?1? outputs switching from high?to?low or low?to?high. the remaining outpu t is measured in the low state. capacitive characteristics symbol parameter condition typical unit c in input capacitance v cc = 3.3 v , v i = 0 v or v cc 5.0 pf c out output capacitance v cc = 3.3 v , v i = 0 v or v cc 7.0 pf c pd power dissipation capacitance (note 11) per input; v i = gnd or v cc pf v cc = 1.65 v to 1.95 v 7.7 v cc = 2.3 v to 2.7 v 11.3 v cc = 3.0 v to 3.6 v 14.4 11. c pd is used to determine the dynamic power dissipation (p d in w). p d = c pd * v cc 2 x fi * n + (c l x v cc 2 x fo) where: fi = input frequency in mhz; fo = output frequency in mhz c l = output load capacitance in pf v cc = supply voltage in volts n = number of outputs switching (c l * v cc 2 x fo) = sum of the outputs.
74lvc540a www. onsemi.com 6 waveform 2 - output enable and disable times t r = t f = 2.5 ns, 10% to 90%; f = 1 mhz; t w = 500 ns 2.7 v 0 v 0 v oen on t pzh 3.0 v t phz t pzl t plz on 1.5 v 1.5 v figure 3. ac waveforms 1.5 v v cc v oh - 0.3 v v ol + 0.3 v gnd symbol v cc 3.3 v 0.3 v 2.7 v v cc < 2.7 v vmi vmo v hz v lz 1.5 v 1.5 v v ol + 0.3 v v oh ? 0.3 v 1.5 v 1.5 v v ol + 0.3 v v oh ? 0.3 v v cc /2 v cc /2 v ol + 0.15 v v oh ? 015 v waveform 1 - propagation delays t r = t f = 2.5 ns, 10% to 90%; f = 1 mhz; t w = 500 ns 2.7 v 0 v v oh v ol dn on t plh t phl 1.5 v 1.5 v 1.5 v 1.5 v
74lvc540a www. onsemi.com 7 open pulse generator r t dut v cc r l r 1 c l v ext gnd c l includes jig and probe capacitance r t = z out of pulse generator (typically 50 ) r 1 = r l v i v o supply voltage input load v ext v cc (v) v i t r , t f c l r l t plh , t phl t plz , t pzl t phz , t pzh 1.2 v cc 2 ns 30 pf 1 k open 2 x v cc gnd 1.65 ? 1.95 v cc 2 ns 30 pf 1 k open 2 x v cc gnd 2.3 ? 2.7 v cc 2 ns 30 pf 500 open 2 x v cc gnd 2.7 2.7 v 2.5 ns 50 pf 500 open 2 x v cc gnd 3 ? 3.6 2.7 v 2.5 ns 50 pf 500 open 2 x v cc gnd figure 4. test circuit ordering information device package shipping ? 74lvc540adwr2g soic?20 (pb?free) 1000 / tape & reel 74LVC540ADTR2G tssop?20 (pb?free) 2500 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
74lvc540a www. onsemi.com 8 package dimensions tssop?20 case 948e?02 issue c dim a min max min max inches 6.60 0.260 millimeters b 4.30 4.50 0.169 0.177 c 1.20 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.27 0.37 0.011 0.015 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash, protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane ?w?. 110 11 20 pin 1 ident a b ?t? 0.100 (0.004) c d g h section n?n k k1 jj1 n n m f ?w? seating plane ?v? ?u? s u m 0.10 (0.004) v s t 20x ref k l l/2 2x s u 0.15 (0.006) t detail e 0.25 (0.010) detail e 6.40 0.252 --- --- s u 0.15 (0.006) t 7.06 16x 0.36 16x 1.26 0.65 dimensions: millimeters 1 pitch soldering footprint* *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d.
74lvc540a www. onsemi.com 9 package dimensions 20 1 11 10 b 20x h 10x c l 18x a1 a seating plane h x 45 e d m 0.25 m b m 0.25 s a s b t e t b a dim min max millimeters a 2.35 2.65 a1 0.10 0.25 b 0.35 0.49 c 0.23 0.32 d 12.65 12.95 e 7.40 7.60 e 1.27 bsc h 10.05 10.55 h 0.25 0.75 l 0.50 0.90 0 7 notes: 1. dimensions are in millimeters. 2. interpret dimensions and tolerances per asme y14.5m, 1994. 3. dimensions d and e do not include mold protrusion. 4. maximum mold protrusion 0.15 per side. 5. dimension b does not include dambar protrusion. allowable protrusion shall be 0.13 total in excess of b dimension at maximum material condition. soic?20 wb case 751d?05 issue g on semiconductor and the are registered trademarks of semiconductor components industries, llc (scillc) or its subsidia ries in the united states and/or other countries. scillc owns the rights to a number of pa tents, trademarks, copyrights, trade secret s, and other intellectual property. a listin g of scillc?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent?marking.pdf. scillc reserves the right to make changes without further notice to any product s herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any part icular purpose, nor does sci llc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typi cal? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating param eters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgic al implant into the body, or other applications intended to s upport or sustain life, or for any other application in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer s hall indemnify and hold scillc and its officers , employees, subsidiaries, affiliates, and dist ributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufac ture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 74lvc540a/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative
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